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| SSM9435GM P-channel Enhancement-mode Power MOSFET PRODUCT SUMMARY BVDSS R DS(ON) ID DESCRIPTION The SSM9435GM acheives fast switching performance with low gate charge without a complex drive circuit. It is suitable for low voltage applications such as battery management and general high-side switch circuits. The SSM9435GM is supplied in an RoHS-compliant SO-8 package, which is widely used for medium power commercial and industrial surface mount applications. -30V 50m -5.3A Pb-free; RoHS-compliant SO-8 D D D D G SO-8 S S S ABSOLUTE MAXIMUM RATINGS Symbol VDS VGS ID IDM PD Parameter Drain-source voltage Gate-source voltage Continuous drain current, TC = 25C TC = 70C Pulsed drain current 1 Value -30 20 -5.3 -4.7 -20 2.5 0.02 Units V V A A A W W/C Total power dissipation, TC = 25C Linear derating factor TSTG TJ Storage temperature range Operating junction temperature range -55 to 150 -55 to 150 C C THERMAL CHARACTERISTICS Symbol RJA Parameter Maximum thermal resistance, junction-ambient 3 Value 50 Units C/W Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150C. 2.Pulse width <300us, duty cycle <2%. 3.Mounted on a square inch of copper pad on FR4 board ; 125C/W when mounted on the minimum pad area required for soldering. 2/12/2006 Rev.3.01 www.SiliconStandard.com 1 of 5 SSM9435GM ELECTRICAL CHARACTERISTICS Symbol BVDSS Parameter Drain-source breakdown voltage Breakdown voltage temperature coefficient (at Tj = 25C, unless otherwise specified) Test Conditions VGS=0V, ID=-250uA Reference to 25C, ID=-1mA VGS=-10V, ID=-5.3A VGS=-4.5V, ID=-4.2A Min. -30 -1 Typ. -0.04 10 9 3 5 11 8 25 17 507 222 158 Max. Units 50 90 -3 -1 -25 100 15 810 V V/C m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF BV DSS/Tj RDS(ON) Static drain-source on-resistance2 VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate threshold voltage Forward transconductance VDS=VGS, ID=-250uA VDS=-10V, ID=-5.3A Drain-source leakage current VDS=-30V, VGS=0V VDS=-24V ,VGS=0V, Tj = 70C VGS=20V ID=-5.3A VDS=-24V VGS=-4.5V VDS=-15V ID=-1A RG=6 , VGS=-10V RD=15 VGS=0V VDS=-15V f=1.0MHz Gate-source leakage current Total gate charge 2 Gate-source charge Gate-drain ("Miller") charge Turn-on delay time Rise time Turn-off delay time Fall time Input capacitance Output capacitance Reverse transfer capacitance 2 Source-Drain Diode Symbol VSD trr Qrr Parameter Forward voltage 2 Test Conditions IS=-2.6A, VGS=0V IS=-5.3A, VGS=0V, dI/dt=100A/s Min. - Typ. 29 20 Max. Units -1.2 V ns nC Reverse-recovery time Reverse-recovery charge Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150C. 2.Pulse width <300us, duty cycle <2%. 2/12/2006 Rev.3.01 www.SiliconStandard.com 2 of 5 SSM9435GM 30 30 25 T A =25 C o -10V -8.0V -6.0V -ID , Drain Current (A) -4.5V 25 T A =150 C o -10V -8.0V -6.0V -4.5V -ID , Drain Current (A) 20 20 15 V G =-4.0V 15 V G =-4.0V 10 10 5 5 0 0 1 2 3 4 5 6 0 0 1 2 3 4 5 6 -V DS , Drain-to-Source Voltage (V) -V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 80 1.6 70 I D =-4.2A T A =25C Normalized R DS(ON) 1.4 I D =-5.3A V G = -10V RDS(ON) (m ) 60 1.2 50 1 40 0.8 30 0.6 2 4 6 8 10 12 -50 0 50 100 150 -V GS , Gate-to-Source Voltage (V) T j , Junction Temperature ( o C) Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 3.0 10 8 2.5 6 T j =150 o C 4 -VGS(th) (V) -IS(A) T j =25 o C 2.0 1.5 2 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.0 -50 0 50 100 150 -V SD , Source-to-Drain Voltage (V) T j , Junction Temperature ( C) o Fig 5. Forward Characteristic of Reverse Diode 2/12/2006 Rev.3.01 Fig 6. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 3 of 5 SSM9435GM 14 f=1.0MHz 1000 12 -VGS , Gate to Source Voltage (V) I D = -5.3A V DS = -24V C iss C (pF) 10 8 6 4 C oss C rss 100 1 5 9 13 17 21 25 29 2 0 0 4 8 12 16 20 Q G , Total Gate Charge (nC) -V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 100 1 Normalized Thermal Response (Rthja) Duty Factor = 0.5 0.2 10 1ms -ID (A) 10ms 1 0.1 0.1 0.05 0.02 0.01 100ms 1s 0.1 PDM 0.01 Single Pulse t T Duty Factor = t/T Peak Tj = PDM x Rthja + Ta Rthja=125oC/W T A =25 o C Single Pulse 0.01 0.1 1 10 10s DC 0.001 100 0.0001 0.001 0.01 0.1 1 10 100 1000 -V DS , Drain-to-Source Voltage (V) t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VDS 90% VG QG -4.5V QGS QGD 10% VGS td(on) tr td(off) tf Charge Q Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform 2/12/2006 Rev.3.01 www.SiliconStandard.com 4 of 5 SSM9435GM PHYSICAL DIMENSIONS D SYMBOL A H E MIN 1.35 0.10 0.33 0.19 4.80 3.80 5.80 0.38 MAX 1.75 0.25 0.51 0.25 5.00 4.00 6.50 1.27 A1 B C D E e A C A1 e H L L 1.27(TYP) B All dimensions in millimeters. Dimensions do not include mold protrusions. PART MARKING PART NUMBER: 9435GM XXXXXX YWWSSS DATE/LOT CODE: (YWWSSS) Y = last digit of the year WW = week SSS = lot code sequence PACKING: Moisture sensitivity level MSL3 3000 pcs in antistatic tape on a 13 inch (330mm) reel packed in a moisture barrier bag (MBB). 2/12/2006 Rev.3.01 www.SiliconStandard.com 5 of 5 |
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